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Product Summary
The SN74ABT16823DLR is an 18-bit bus-interface flip-flop with 3-state outputs. The SN74ABT16823DLR features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The SN74ABT16823DLR is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
Parametrics
SN74ABT16823DLR absolute maximum ratings: (1)Supply voltage range, VCC:–0.5V to 7V; (2)Input voltage range, VI: –0.5V to 7V; (3)Voltage range applied to any output in the high or power-off state, VO:–0.5V to 5.5V; (4)Current into any output in the low state, IO: 128 mA; (5)Input clamp current, IIK (VI＜0):–18 mA; (6)Output clamp current, IOK (VO＜0):–50 mA; (7)Package thermal impedance, θJA: 74℃/W; (8)Storage temperature range, Tstg: –65℃ to 150℃.
Features
SN74ABT16823DLR features: (1)Members of the Texas Instruments Widebus Family; (2)State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation; (3)High-Impedance State During Power Up and Power Down; (4)ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0); (5)Typical VOLP (Output Ground Bounce) ＜ 1 V at VCC = 5 V, TA=25℃; (6)Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise; (7)Flow-Through Architecture Optimizes PCB Layout; (8)High-Drive Outputs (–32-mA IOH, 64-mA IOL); (9)Package Options Include Plastic 300-mil Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings.
Diagrams
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 SN74ABT16823DLR |
Texas Instruments |
Flip Flops 18but Flip Flop |
Data Sheet |
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SN74ABT16823DLRG4 |
Texas Instruments |
Flip Flops 18-Bit Bus Interface F-F W/3-State Otpt |
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