Product Summary

The SN74LVC1G332YZPR is a single 3-input positive-or gate. The SN74LVC1G332YZPR performs the Boolean function in Y=A+B+C or Y=A× B×C positive logic. NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. The SN74LVC1G332YZPR is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Parametrics

SN74LVC1G332YZPR absolute maximum ratings: (1)Supply voltage range: –0.5V to 6.5V; (2)Input voltage range: –0.5V to 6.5V; (3)Voltage range applied to any output in the high-impedance or power-off state: –0.5V to 6.5V; (4)Voltage range applied to any output in the high or low state:–0.5V to VCC + 0.5V; (5)Input clamp current VI<0: –50mA; (6)Output clamp current VO<0: –50mA; (7)Continuous output current: ±50mA; (8)Continuous current through VCC or GND: ±100mA; (9)θJA Package thermal impedance: 123℃/W; (10)Storage temperature range: –65℃ to 150℃.

Features

SN74LVC1G332YZPR features: (1)Available in the Texas Instruments NanoStar and NanoFree Packages; (2)Supports 5-V VCC Operation; (3)Inputs Accept Voltages to 5.5 V; (4)Max tpd of 4.5 ns at 3.3 V; (5)Low Power Consumption, 10-μA Max ICC; (6)±24-mA Output Drive at 3.3 V; (7)Ioff Supports Partial-Power-Down Mode Operation; (8)Latch-Up Performance Exceeds 100mA Per JESD 78, Class II; (9)ESD Protection Exceeds JESD 22: 2000-V Human-Body Model (A114-A), 200-V Machine Model (A115-A), 1000-V Charged-Device Model (C101).

Diagrams

SN74LVC1G332YZPR block diagram

Image Part No Mfg Description Data Sheet Download Pricing
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SN74LVC1G332YZPR
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