SN74LVU04DR

hex inverter, SOIC14, 200 pF, 250 mA, –0.5 V to 7 V, SN74LVU04DR

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Price:: US $0.16~0.16 / piece [Get Latest Price]

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PartNumber:: SN74LVU04DR

Brand:: Texas Instruments - TI | Pack: SO | D/C: 11+

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Products Upload time: 2012-08-06

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Product Summary

The SN74LVU04DR is a hex inverter. It is designed for 2.7-V to 5.5-V VCC operation. It contains six independent inverters with unbuffered outputs. The SN74LVU04DR performs the Boolean function Y = A. The SN74LVU04DR is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

Parametrics

SN74LVU04DR absolute maximum ratings: (1)Supply voltage range, VCC: –0.5 V to 7 V; (2)Input voltage range, VI: –0.5 V to VCC + 0.5 V; (3)Output voltage range, VO: –0.5 V to VCC + 0.5 V; (4)Input clamp current, IIK (VI < 0 or VI > VCC): ±20 mA; (5)Output clamp current, IOK (VO < 0 or VO > VCC): ±50 mA; (6)Continuous output current, IO (VO = 0 to VCC): ±25 mA; (7)Continuous current through VCC or GND: ±50 mA; (8)Maximum power dissipation at TA = 55℃ (in still air) D package: 1.25 W, DB or PW package: 0.5 W; (9)Storage temperature range, Tstg: –65℃ to 150℃.

Features

SN74LVU04DR features: (1)EPIC (Enhanced-Performance Implanted CMOS) 2-μ Process; (2)Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25℃; (3)Typical VOHV (Output VOH Undershoot) > 2 V at VCC, TA = 25℃; (4)ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0); (5)Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17; (6)Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Ceramic (J) 300-mil DIPs.